* Behavioral Logic Gates * Tim Williams, 2017-11-28 * * Does model: * - Input threshold, overall voltage gain * - Buffered logic * - Propagation delay, output rise time * * Does not model: * - Temperature Dependence * - Input Characteristics (ESD diodes, capacitance, leakage) * - VDD Dependence * - Supply Current * * Pinout: * A, B Input(s) * Y Output * VDD Positive Supply * VSS Negative Supply * VSS is the reference node for inputs and output. * VDD sets the output voltage range. * .SUBCKT BEH_NOR A B Y VDD VSS PARAMS: Threshold=2.5V OutRes=100 Cdelay=100p Gain=10k CA INA 0 {Cdelay} CB INB 0 {Cdelay} CS SUM 0 {Cdelay} CG GAIN VSS {Cdelay/5} D1 VDIO 0 IDEALD TEMP=23 D2 GAIN VDIO_PR IDEALD TEMP=23 D3 0 INA IDEALD TEMP=23 D4 INA 0 IDEALD TEMP=23 D5 0 SUM IDEALD TEMP=23 D6 SUM 0 IDEALD TEMP=23 D7 VDIO_NR GAIN IDEALD TEMP=23 D8 0 INB IDEALD TEMP=23 D9 INB 0 IDEALD TEMP=23 E1 VDD VDIO_P VDIO 0 1.0 E2 GB VSS GAIN VSS 1.0 E3 VDIO_N VSS VDIO 0 1.0 G1 INA 0 A TH -1.0m G2 SUM 0 INA 0 -1.0m G3 GAIN VSS SUM 0 1.0m G4 INB 0 B TH -1.0m G5 SUM 0 INB 0 -1.0m I1 0 VDIO 1.0m I2 0 SUM 1.0m RA INA 0 {1k*Gain^(1/4)} RB INB 0 {1k*Gain^(1/4)} RS SUM 0 {1k*Gain^(1/4)} RG GAIN VSS {1k*Gain^(1/2)} RD2 VDIO_P VDIO_PR 1.0 RD7 VDIO_N VDIO_NR 1.0 RY GB Y {OutRes} VTH TH VSS {Threshold} .MODEL IDEALD D ( IS=1p N=1.8 RS=1m XTI=0 ) .ENDS .SUBCKT BEH_NAND A B Y VDD VSS PARAMS: Threshold=2.5V OutRes=100 Cdelay=100p Gain=10k CA INA 0 {Cdelay} CB INB 0 {Cdelay} CS SUM 0 {Cdelay} CG GAIN VSS {Cdelay/5} D1 VDIO 0 IDEALD TEMP=23 D2 GAIN VDIO_PR IDEALD TEMP=23 D3 0 INA IDEALD TEMP=23 D4 INA 0 IDEALD TEMP=23 D5 0 SUM IDEALD TEMP=23 D6 SUM 0 IDEALD TEMP=23 D7 VDIO_NR GAIN IDEALD TEMP=23 D8 0 INB IDEALD TEMP=23 D9 INB 0 IDEALD TEMP=23 E1 VDD VDIO_P VDIO 0 1.0 E2 GB VSS GAIN VSS 1.0 E3 VDIO_N VSS VDIO 0 1.0 G1 INA 0 A TH -1.0m G2 SUM 0 INA 0 -1.0m G3 GAIN VSS SUM 0 1.0m G4 INB 0 B TH -1.0m G5 SUM 0 INB 0 -1.0m I1 0 VDIO 1.0m I2 0 SUM -1.0m RA INA 0 {1k*Gain^(1/4)} RB INB 0 {1k*Gain^(1/4)} RS SUM 0 {1k*Gain^(1/4)} RG GAIN VSS {1k*Gain^(1/2)} RD2 VDIO_P VDIO_PR 1.0 RD7 VDIO_N VDIO_NR 1.0 RY GB Y {OutRes} VTH TH VSS {Threshold} .MODEL IDEALD D ( IS=1p N=1.8 RS=1m XTI=0 ) .ENDS .SUBCKT BEH_OR A B Y VDD VSS PARAMS: Threshold=2.5V OutRes=100 Cdelay=100p Gain=10k CA INA 0 {Cdelay} CB INB 0 {Cdelay} CS SUM 0 {Cdelay} CG GAIN VSS {Cdelay/5} D1 VDIO 0 IDEALD TEMP=23 D2 GAIN VDIO_PR IDEALD TEMP=23 D3 0 INA IDEALD TEMP=23 D4 INA 0 IDEALD TEMP=23 D5 0 SUM IDEALD TEMP=23 D6 SUM 0 IDEALD TEMP=23 D7 VDIO_NR GAIN IDEALD TEMP=23 D8 0 INB IDEALD TEMP=23 D9 INB 0 IDEALD TEMP=23 E1 VDD VDIO_P VDIO 0 1.0 E2 GB VSS GAIN VSS 1.0 E3 VDIO_N VSS VDIO 0 1.0 G1 INA 0 A TH -1.0m G2 SUM 0 INA 0 -1.0m G3 GAIN VSS SUM 0 -1.0m G4 INB 0 B TH -1.0m G5 SUM 0 INB 0 -1.0m I1 0 VDIO 1.0m I2 0 SUM 1.0m RA INA 0 {1k*Gain^(1/4)} RB INB 0 {1k*Gain^(1/4)} RS SUM 0 {1k*Gain^(1/4)} RG GAIN VSS {1k*Gain^(1/2)} RD2 VDIO_P VDIO_PR 1.0 RD7 VDIO_N VDIO_NR 1.0 RY GB Y {OutRes} VTH TH VSS {Threshold} .MODEL IDEALD D ( IS=1p N=1.8 RS=1m XTI=0 ) .ENDS .SUBCKT BEH_AND A B Y VDD VSS PARAMS: Threshold=2.5V OutRes=100 Cdelay=100p Gain=10k CA INA 0 {Cdelay} CB INB 0 {Cdelay} CS SUM 0 {Cdelay} CG GAIN VSS {Cdelay/5} D1 VDIO 0 IDEALD TEMP=23 D2 GAIN VDIO_PR IDEALD TEMP=23 D3 0 INA IDEALD TEMP=23 D4 INA 0 IDEALD TEMP=23 D5 0 SUM IDEALD TEMP=23 D6 SUM 0 IDEALD TEMP=23 D7 VDIO_NR GAIN IDEALD TEMP=23 D8 0 INB IDEALD TEMP=23 D9 INB 0 IDEALD TEMP=23 E1 VDD VDIO_P VDIO 0 1.0 E2 GB VSS GAIN VSS 1.0 E3 VDIO_N VSS VDIO 0 1.0 G1 INA 0 A TH -1.0m G2 SUM 0 INA 0 -1.0m G3 GAIN VSS SUM 0 -1.0m G4 INB 0 B TH -1.0m G5 SUM 0 INB 0 -1.0m I1 0 VDIO 1.0m I2 0 SUM -1.0m RA INA 0 {1k*Gain^(1/4)} RB INB 0 {1k*Gain^(1/4)} RS SUM 0 {1k*Gain^(1/4)} RG GAIN VSS {1k*Gain^(1/2)} RD2 VDIO_P VDIO_PR 1.0 RD7 VDIO_N VDIO_NR 1.0 RY GB Y {OutRes} VTH TH VSS {Threshold} .MODEL IDEALD D ( IS=1p N=1.8 RS=1m XTI=0 ) .ENDS .SUBCKT BEH_NOT A Y VDD VSS PARAMS: Threshold=2.5V OutRes=100 Cdelay=100p Gain=1k CA INA 0 {Cdelay} CG GAIN VSS {Cdelay/5} D1 VDIO 0 IDEALD TEMP=23 D2 GAIN VDIO_PR IDEALD TEMP=23 D3 0 INA IDEALD TEMP=23 D4 INA 0 IDEALD TEMP=23 D7 VDIO_NR GAIN IDEALD TEMP=23 E1 VDD VDIO_P VDIO 0 1.0 E2 GB VSS GAIN VSS 1.0 E3 VDIO_N VSS VDIO 0 1.0 G1 INA 0 A TH -1.0m G3 GAIN VSS INA 0 1.0m I1 0 VDIO 1.0m RA INA 0 {1k*Gain^(1/2)} RG GAIN VSS {1k*Gain^(1/2)} RD2 VDIO_P VDIO_PR 1.0 RD7 VDIO_N VDIO_NR 1.0 RY GB Y {OutRes} VTH TH VSS {Threshold} .MODEL IDEALD D ( IS=1p N=1.8 RS=1m XTI=0 ) .ENDS .SUBCKT BEH_BUF A Y VDD VSS PARAMS: Threshold=2.5V OutRes=100 Cdelay=100p Gain=1k CA INA 0 {Cdelay} CG GAIN VSS {Cdelay/5} D1 VDIO 0 IDEALD TEMP=23 D2 GAIN VDIO_PR IDEALD TEMP=23 D3 0 INA IDEALD TEMP=23 D4 INA 0 IDEALD TEMP=23 D7 VDIO_NR GAIN IDEALD TEMP=23 E1 VDD VDIO_P VDIO 0 1.0 E2 GB VSS GAIN VSS 1.0 E3 VDIO_N VSS VDIO 0 1.0 G1 INA 0 A TH -1.0m G3 GAIN VSS INA 0 -1.0m I1 0 VDIO 1.0m RA INA 0 {1k*Gain^(1/2)} RG GAIN 0 {1k*Gain^(1/2)} RD2 VDIO_P VDIO_PR 1.0 RD7 VDIO_N VDIO_NR 1.0 RY GB Y {OutRes} VTH TH VSS {Threshold} .MODEL IDEALD D ( IS=1p N=1.8 RS=1m XTI=0 ) .ENDS .SUBCKT BEH_COMP IN_P IN_N Y VDD VSS PARAMS: OutRes=100 Cdelay=100p Gain=10k CA INA 0 {Cdelay} CG GAIN VSS {Cdelay/8} D1 VDIO 0 IDEALD TEMP=23 D2 GAIN VDIO_PR IDEALD TEMP=23 D3 0 INA IDEALD TEMP=23 D4 INA 0 IDEALD TEMP=23 D7 VDIO_NR GAIN IDEALD TEMP=23 E1 VDD VDIO_P VDIO 0 1.0 E2 GB VSS GAIN VSS 1.0 E3 VDIO_N VSS VDIO 0 1.0 G1 INA 0 IN_P IN_N -1.0m G3 GAIN VSS INA 0 -1.0m I1 0 VDIO 1.0m RA INA 0 {1k*Gain^(1/2)} RG GAIN VSS {1k*Gain^(1/2)} RD2 VDIO_P VDIO_PR 1.0 RD7 VDIO_N VDIO_NR 1.0 RY GB Y {OutRes} .MODEL IDEALD D ( IS=1p N=1.8 RS=1m XTI=0 ) .ENDS