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Reverse Engineering: 5V Converter

02/28/2018

Introduction

This is a valuable skill. The engineer must be familiar with the state of art in their field. (And a bit of historical knowledge doesn't hurt, either!) Seeing how others have solved problems, gives ideas that can be applied to one's own work. And taking a critical look at existing work, provides lessons on how to do—and not to do—things. Even without taking apart a circuit board and reconstructing a complete schematic, valuable insights can be found just by inspecting the component choice and layout of a circuit.

While a practical assignment today might be to analyze a multilayer board, this is quite tedious, and a simpler example will do nicely. This example shows off a 5V DC-DC converter module, that was part of an old data tape machine (of since-forgotten providence).

 

Artwork

Component Side

Solder Side

The assembly, as-is. The PCB is 101.3 × 157.1 mm, and the heatsink is 99 × 75 × 32.3 mm. The crinkled finish on the bottom side is due to the older fab process, soldermask over tinned copper. (Amazingly, there is also silkscreen over soldermask openings, and a number of places where silkscreen was allowed over solder pads! Modern fabs trim these overlapped features automatically.) Copper is probably 2oz. Soldermask is glossy, fairly thick, possibly silkscreen printed rather than dry film (which was common back then). The input fuse is 250V 4A (though the fuse holder is marked "3A" in small permanent marker; a technician's note perhaps?), and the three wires (input, ground and output) are 18AWG stranded.

Offhand, we can guess this is a switching DC-DC module: most prominently, there is a large ferrite inductor towards the output. The components on the heatsink are IRFZ20 and BYW29-100. The ICs are SN74LS132N and CA3524E, the latter a well-known voltage-mode controller IC. All TO-92 transistors are "C635" and "C636"; these are of course BC series transistors, 45V 1A hFE≈100, NPN and PNP respectively. (Be careful distinguishing British BCxxx and Japanese 2SCxxx number schemes! In this case, the Philips logo everywhere is a good hint these are BC type. Also, 2SC635/6 happen to be an RF power transistor. Never hurts to check though.) All date codes cluster around late 1984 to early 1985, placing production around there.

It's not obvious how the 'LS132, a quad schmitt trigger NAND, fits into the circuit. '3524-based circuits are well known, and they're usually stand-alone, just the controller. It will be interesting to see how it is used—a pulse latch, perhaps?

Also interesting: as we look around, we notice a string of low-value resistors, 0.22Ω 10%, 1/2W size. These are wired in parallel, for a total 55mΩ current sense shunt. This seems fairly unusual, and exciting—the CA3524 is a voltage-mode controller; app notes rarely if ever discuss current-mode control methods. (Much to my frustration, as so many newcomers read about these old, but still very available, and very cheap, controllers, and think voltage mode control is the only way.) So perhaps we stand to learn something from this old module after all: an example of a PWM controller used right, perhaps?

There's also a "hash choke" and 1500μF 40V electrolytic at the input, and four 330μF 10V electrolytics at the output. And there's one suspicious TO-220 part by the input; this happens to be a S0810BH SCR, connected across the input as crowbar. Presumably this is triggered by overvoltage on the output; we'll see.

 

Schematic

To create the schematic, first we must derive the netlist, or how components are connected together. This takes a lot of flipping back and forth, or inspecting the board in person. A composite image is usually the first step.

Composite Layers

This rather sinister looking figure, shows the bottom layer in red (flipped), and the top layer in cyan. The photograph's perspective has been corrected so the layers line up and the PCB is flat and rectangular. (This makes anything tall look really weird, and so it still takes conscious effort to read where the pins and traces are. Eh, nothing's free.)

More image editing probably isn't very helpful at this stage. The crinkle finish and uneven lighting makes it tough to run a reasonable threshold or color replacement on the images. They can be read by eye as-is, or the traces drawn on by hand. It's going to be tedious either way; might as well just dive in and get something done.

Composite Tracing

For completeness's sake, let's say we went ahead and traced the artwork... Now we have a raster image, which can be imported as graphics in a PCB editor. The connections are clear and the components are labeled, so we can build a partial netlist now. We start by naming the nodes, then calling out the components, and which nodes they connect to. Keep in mind, this is drawn from the photograph: it looks like there probably are traces underneath the ICs, which I can't see. I've drawn these as ground, because I can't tell anything better, but we'll see...

Along the way, I'm noticing what IC pins and circuit functions the nodes are associated with, so I've named the apparent ones. The Vn nodes I'm not so sure about, and I want to draw those out to get a better feel for what they do. IC1 is enigmatic: it seems to have three outputs shorted to ground... Probably, those are actually connected between, and ground is not solid under the chip. Good opportunity to get out the ohmmeter: the pins indeed do not connect to ground, but connect like so: IC1-6 to IC1-9, IC1-5 to IC1-11.

R1   0     IS3   4.7k  TOL=2%
R2   IS4   IS3   10k   TOL=1%
R3   IS4   0     1k    TOL=1%
R4   IS5   VREF  4.7k  TOL=2%
R5   VIN   V1    2k    TOL=1%
R6   VREF  SS    560k  TOL=5%
R7   VMAX  VREF  3.9k  TOL=1%
R8   0     VMIN  4.7k  TOL=2%
R9   COMP  CMPZ  51k   TOL=1%
R10  0     RT    8.2k  TOL=2%
R11  DRV1  VIN   2k    TOL=1%
R12  DRV2  DRV3  15k   TOL=1%
R13  V3    DRV3  820   TOL=1%
R14  DRV4  0     4.7k  TOL=2%
R15  IS2   IS1   1k    TOL=1%
R16  VIN   IS1   0.22  TOL=10%
R17  VIN   IS1   0.22  TOL=10%
R18  VIN   IS1   0.22  TOL=10%
R19  VIN   IS1   0.22  TOL=10%
R20  G2    G3    180   TOL=2%
R21  CB1   CB2   10    TOL=1%
R22  0     CB1   100   TOL=1%
R23  OUT   INV   4.7k  TOL=2%
R24  0     INV   4.7k  TOL=2%
R25  VMIN  VSET  VMAX  1k  POT_3329H
R26  V8    V4    1k    TOL=1%
R27  0     V4    1k    TOL=1%
R28  OSC   0     2.7k  TOL=2%
C1   SS    0     2.2u  POL_63V
C2   V2    0     0.1u  CER_Z5U
C3   0     VSET  0.1u  CER_Z5U
C4   0     CMPZ  1n    CER_102_SILV_SILV
C5   0     CT    2.2n  CER_222_SILV
C6   DRV2  DRV3  390p  CER_391_SILV_SILV
C7   VIN   0     C7-3  1500u  POL_40V_3PIN
C8   VIN   0     0.1u  CER_Z5U
C9   VBS   SW    0.1u  CER_Z5U
C10  0     OUT   0.1u  CER_Z5U
C11  OUT   0     330u  POL_10V
C12  OUT   0     330u  POL_10V
C13  OUT   0     330u  POL_10V
C14  OUT   0     330u  POL_10V
C15  0     CB1   0p    DNP
D1   0     V1    BZX79C13
D2   COMP  SS    1N4148
D3   CB1   OUT   BZX79C5V6
D4   DRV2  DRV1  1N4148
D5   V2    VBS   1N4148
D6   VBS   V3    1N4148   
D7   DRV3  V3    1N4148
D8   DRV4  G1    1N4148
D9   0     SW    BYW29-100
D11  V7    VIN   BZX79C5V6
D12  V4    V7    BZX79C5V6
D13  0     V8    BZX79C4V7
TR1  IS5   IS4   0     BC635
TR2  VIN   V1    V2    BC635
TR3  VIN   DRV1  DRV2  BC635
TR4  DRV4  DRV3  V3    BC636
TR5  IS3   IS2   VIN   BC636
TR6  IS1   G3    SW    IRFZ20
TR7  0     DRV4  G1    BC636
IC1  IS5  V5    V6   V6  V9  V5  0    SHDN  V5    V8    V9  OSC   OSC   VREF  SN74LS132N
IC2  INV  VSET  OSC  0   0   RT  CT   0     COMP  SHDN  0   DRV1  DRV1  0     VIN  VREF  CA3524E
L1   SW    OUT   0     0    RM10_3C8_A250_12.5T
L2   IN    IN1   10u   AXIAL_HASH_CHOKE
SCR  VIN   CB2   0     S0810BH
SW   0     G1    G2    G2   DIPSW_SDC-1-023
FS8  IN1   VIN   3A    FUSE_3AG_HOLDER
IN   IN
GND  0
OUT  OUT

Some quirks: this isn't quite SPICE netlist format—C7, R25, IC1, IC2, SCR and SW need a 'X' prefix (denotes a subcircuit), 'TR' needs to be 'Q', and there aren't any models (but the correct parts are very easy to find, at least, except maybe for CA3524E). I need to look up the axial capacitor color code yet, so the colors are recorded as a model name.

Unfortunately this isn't very useful for schematic purposes—most tools won't create a schematic from a netlist. But it's another list to check against, and it can be used more or less directly for setting up nets in a PCB.

Schematic

And after a bit of neatening up, here's the schematic. Aha, now it's obvious what the 'V' nodes were doing: some provide bias to the gate driver, some implement a peak current mode latch and UVLO for the controller. Sweet! It indeed seems to be a classic example of using a '3524 the right way!

(I could go on and reconstruct the PCB, but that's not very interesting at this point. This is already a not-terribly-useful investigation, with antique controllers and through-hole components. I wouldn't want to rebuild this as-is; I'd at least use SMT parts, and probably other solutions for the controller and driver. I've already done better with my flashlight project anyway. :) Onward to the interesting bits, then!)

We can now see what the operating voltage range was: D11-D13, R26, R27 and IC1C implement a UVLO section. D11-D12 subtracts about 10V from the supply, and IC1's input threshold is about 2V, so it should turn on around 12-13V and off around 10-11V. D13 prevents overvoltage to IC1, without trying to sink current into the VREF supply, as a clamp diode would (VREF can't sink excess current).

We can also figure the supply voltage from the base voltage dividers. There are two: R2-R3 and R12-R13. For Vbe(on) = 0.9V (that is, what the base voltage would be, if not for the base being a junction; the Thevenin output voltage of the base divider), these give Vin(min) = 9.9V and 17.4V, respectively. Ah, but note that the latter is measured against V3, not VIN—this gives the curious condition that, if bootstrap power is not online, and supply voltage is low, TR4 can't turn on at DC! Fortunately, C6 is more than enough to kick on TR4, and then TR4 and TR6 effectively latch on for the remainder of the cycle (until C9 discharges, or the controller turns it off). Since the bootstrap effectively doubles VIN, it can run with safe gate voltage as soon as UVLO kicks on. Smart!

As for maximum operating voltage, it is not prescribed by any circuit functions; simply a matter of which thing dies first. Gate drive voltage is set by D1, so TR6 is safe. The hottest bias dividers are D11-D13 + R26, and R5 + D1. If these are 1/4W resistors (looks right), the first burns up beyond 32V, and the second, 35V. The CA3524E is rated 40V, the BJTs 45V, and the MOSFET 50V.

We also see the maximum output current: BYW29-100 is rated for 8A at elevated temperature, and give or take duty cycle, can probably handle 10 or 12A on this heatsink. The current detection circuit gives a hard limit around 13A peak. If output current ripple is modest (~20%), we should expect a maximum DC output of 10-11A.

The switch is kind of bizarre. I wonder if it was intended as a power on/off, without adding additional logic? A better function might've been a shunt across D13, asserting SHDN. Switching gate drive directly can be a dangerous preposition: if the switch is break-before-make type, the gate is left floating; in the intervening milliseconds, it can become biased into the linear range, and burn up (and probably induce output overvoltage, triggering the crowbar, potentially damaging the SCR in the process—and now a simple service test has turned into a board repair/replacement). Worse still, if the switch is opened during an output-high pulse, the gate simply hangs at +12V until it blows up and/or the crowbar fires.

 

Circuit Design Lessons

It turns out, this is a pretty informative little circuit. Let's dig in!

Supply Overvoltage. If input surge is expected, the CA3524E would be the first to pop. A protection circuit would be a welcome addition, and we can think about how it might be applied here. It could be as simple as a series supply resistor (say 10-100 ohms in series with IC1, R11 and TR3's VIN wire) and a 33V zener/TVS diode. If continuous voltage swell were expected (say in an automotive environment, where load dump is a possibility), a series pass regulator, disconnect, or crowbar would be necessary. We already have a crowbar, so a second zener could be added to it, as a wired-OR trigger source.

Supply Current. This thing is hungry! The CA3524E takes 4mA (typical), has several mA of loads (OSC, RT, VREF), and R11 and the UVLO and gate supply dividers draw over 30mA together! The dividers could've been made with 10-100 times larger resistors, maybe choosing the next step higher zener voltages (since a zener isn't a perfect regulator, but has some softness to its V-I curve). A couple of resistors could also be made larger if a higher hFE transistor were chosen—BC635 has kind of low hFE, whereas BC846C has over four times as much. Alternately, a smaller transistor (lower current rating, less capacitance) might be used, to save bias current while keeping rise/fall time reasonable. (Collector capacitance * load resistance will be the limiting factor on speed at IS3 and DRV4. Incidentally, R11 is not the limiting factor at DRV1: CA3524E outputs take about 200ns to turn on or off, so it's about right.) All told, we could save a watt or two, handily, without significantly changing the circuit otherwise. It's curious why they didn't make such obvious changes already; ah well, these were the days when power and heatsinks were cheap (or so it seems..).

Switching Efficiency. It'll be okay—certainly better than a linear supply, especially for VIN over 10V—but it won't be setting any records, that's for sure! There are a few limiting factors here: CA3524E is pretty slow as-is (taking about 200ns for its outputs to swing), and TR4 + R14 isn't a very strong pull-down (resulting in a fairly long tail, as Vgs drops below the Miller step—the Miller step, by the way, will be driven while SW is falling, where R14 will do an okay job). R20 is also quite large.

On the upside, IRFZ20 is a pretty small transistor, with Qg(tot) = 17nC max (equivalent to about 1.7nF). It can be driven quickly, if simply told to move its butt. As shown, R20 probably gives the dominant time constant (about 300ns), but reducing it to 47Ω or less merely makes TR4 and R14 the critical path. It might be reasonable to change R14 for a constant current sink, or for that matter, a switched current sink (ooh, and we have the DRV2 signal handy to run it). D8 could also be replaced with an NPN emitter follower, reducing stress on TR4 and improving rise time further. (Incidentally, TR4 should be pretty capable at turn-on, thanks to C6 really goosing it.) D6 also looks strange; it seems like it prevents turn-off (by allowing C6 to keep TR4 high while TR6 swings off), so could be shorted through. With these changes, there should be a modest savings in gate drive power requirements (less bias wasted in R14, and R11 can be dealt with as well), while reducing switching time to 100ns or less. (I would expect a savings in switching losses of around 5W at full load.)

At this point, further improvement would be challenging. The physical layout of this board is not tight. TR6 and D9 are quite high off the board, and the loop through D16-R19 and C8 is quite long, approx. 30nH worth, if I had to guess. Still, with Coss ~ 400pF, this gives a switching time constant around 5ns, suggesting that commutation times below 50ns are still very reasonable. There are also two ferrite beads not shown on the schematic (TR6 drain and D9 cathode), which I might change to a single ferrite bead on TR6 gate or source, if necessary to dampen oscillations. An R+C damper, or RCD (dV/dt) snubber, across TR6 D-S, might also be beneficial.

A better-performing transistor could be used, of course. They didn't have these back then, but a modern replacement would be capable of boosting efficiency a few points.

Several of these improvements already require a lot of effort: not just replacing components, but lifting legs, cutting traces, and hacking in new components. Downright heroic would be rebuilding the switching loop for lower stray inductance...

Buck Diode. The BYW29-100 is a pretty fast diode, trr = 25ns. No worries there, especially with the slow gate drive. But it achieves this at a price: ~0.9V typical Vf. The modern option would be a schottky diode; any modern 10A, 40V or 60V part would do nicely here. Since the diode spends most of the time in conduction, this is a big savings: instead of stealing 0.9V from the output, we're stealing 0.6V or less. At 5V 10A output, that's a cool 3W+ saved! The increased capacitance is inconsequential at this frequency, and the increased current leakage is minor (especially with such a huge heatsink to keep it cool). (For historical relevance: they wouldn't have had much option back then, as schottkys were still being introduced for power applications. The other choice would be a synchronous rectifier, but that doubles the cost of MOSFETs in the project, and doesn't allow discontinuous current mode (DCM) operation at light loads, without adding a lot more logic. The PN diode was the right choice at the time.)

Current Mode Control. Well, it's not really current-mode, sadly. Normally, the control is exclusively voltage mode, and TR1, TR5 and IC1 remain in their default/off states. The key is that there is no bias to R15 to set an adjustable current threshold, and the output depends on the PWM comparator. Only during transient or fault conditions, where IS1 drops ~0.7V, does TR5 turn on, and kick the SHDN chain. SHDN remains latched until the oscillator cycles again, so it has a peak-current-mode behavior in overload conditions.

It's actually pretty impressive that they went to such lengths—two transistors and a logic IC—just to implement this, instead of using a cheaper hack more typical of the time. While it's not a full current mode control, it at least won't burn itself up just because it's been turned on, or because of a load transient or whatever. (Did I mention my opinion on the inferiority of voltage mode controls?..)

Could a current mode control be implemented? Tricky. We can use the CA3524E error amp to control current, but we need to sense average current somehow. Typically, this would be a shunt in series with the inductor (connected to the OUT node), but we need a diff amp to bring that signal down to ground level. That's a bit of a pain. If we can split the ground return path, we can put it in series with the output filter caps and load—but the input and output must be isolated (or at least tolerant of this break), and this isn't always possible. If we must have a three-terminal module (input, output and ground), we can't use this solution. DC current can also be reconstructed using two current transformers, one for the MOSFET and one for the diode, but this is costly and bulky.

We would also need to add another error amplifier, because the CA3524E doesn't have an uncommitted one (and neither does the TL494, or any other one in the extended family of similar voltage-mode controllers, at least that I know of). On the upside, this can be as simple as a single TL431. (Which, by the way: the TL431 is rather poorly described as an "adjustable zener diode", and more correctly as, an operational amplifier with a huge (and conspicuously stable!) input offset voltage, and an open collector output.)

Output Inductor. Now this is a quirky one! Did you spot it? Here's a diagram:

Inductor Half Turn

I've seen many fall for this trap! Some say it's perfectly fine; so what? Some claim massively increased EMI. Some claim massively increased losses.

What's the real answer? Well, the winding is wrong—it's not fine. What effects that'll have in the circuit, who knows—let's get to that in a moment. First, about the inductor itself.

In a normal, single-gapped core (I haven't opened this up, but it must be that type—I'm quite comfortable assuming this), flux flows through the center peg (around which the windings are placed), and out to the two legs (this applies to the RM core used here, as well as E, P ('pot') and other types). The flux splits evenly between the two legs, because there is no force (magnetomotive force, that is) making it do otherwise; it simply divides according to the reluctance of the two paths, just as current divides between parallel resistors. This happens when the winding is only around the center limb.

Suppose we always connect to a winding with a tightly twisted pair, so that negligible magnetic field is given off by the leads. It doesn't matter how close these leads are to the core, or whether they intersect it somehow or another: the flux is always balanced, and the external field from the leads is small. As we move the leads around, we see it does not matter where they are. In electromagnetic parlance, the twisted pair encloses no cross-sectional area of the core. No effect.

If we break this assumption, now it matters where the leads are. Suppose we open up the twisted leads, making a little loop between the wires. Suppose we position this loop around the center limb of the core. Well, obviously, we've just added or subtracted a turn from the core. So what? Suppose we pulled tight on the leads, so their twist unwinds a bit, and the new turn cinches up to the original winding. Well, the slack disappears, and it becomes patently obvious that we've added or subtracted a turn from the winding. Nothing strange there.

Well, suppose we do the same thing with a side leg instead. If we hook one wire completely around a limb, and pull tight to unwind the twisted leads a bit, we find it doesn't cinch down to a single winding with a twisted pair coming off. It's different.

This is the important take-away from this thought experiment: we can treat any arbitrary winding, as the sum of some number of turns around the center limb, and around one or the other outer limb. Thus, we transform the physical inductor (top-left, with the winding entering one side and exiting the other) into two windings, in this case most of it around the center limb and one turn around an outer limb.

The superposition goes further (ah, until superposition is broken—hold onto that thought). Since there are two independent flux paths in the core (through the center, and around just the outer limbs, marked in dotted lines), we can also draw an equivalent circuit, using two separate inductors in series.

And this is where things get quirky. We have two inductors, one gapped, one ungapped. What is the effect of air gap? Gap gives lower inductance and higher stored energy. As current rises, an ungapped inductor saturates quickly, dropping to a low inductance. A gapped inductor saturates slowly, storing a lot of energy at its nominal inductance value, before dropping off.

(Saturation in ungapped cores includes ferrite beads, by the way, even the ferrite beads on the MOSFET and diode. Hence, beads don't do much at full load current; but they aren't completely redundant, as they are still able to absorb noise that occurs at low currents, when the switch is just beginning to turn on, or finishing turning off.)

But the problem is this: the flux paths aren't actually independent. They're the same paths, with flux going in two different directions. When saturation occurs, superposition is broken. One leg, the fluxes add, the other they subtract. One leg saturates before the other, and it saturates at quite low current, maybe an ampere. That changes the flux balance in the main winding: one leg becomes cut off, forcing all the flux through the other leg (now it looks like a 'U' core, with only one active loop). This, in turn, can only go on until that leg saturates. Now, the other leg is pre-biased by this, sitting around -Bsat, so it has double the flux to go before saturating in the positive direction. The main winding will still saturate at the design flux (give or take half a turn).

So what about losses, EMI and all that?

We should expect one weirdness from this design: a plot of inductance vs. DC bias will have a flat spot around zero, where the half-turn acts like a ferrite bead. The inductance is large, but the current is small, so it does not store appreciable energy. Then that path saturates, and the main path kicks in. The slope remains flat until overall core saturation occurs. This is clearly unsuitable for AC inductors when linearity is desired.

The core being biased around saturation isn't necessarily a bad thing, but it probably increases losses. I've seen very little data about loss as a function of DC bias, so I won't make a claim about whether it's actually worse or not. This application is mostly DC, so we should not expect a large contribution from reversal, at least.

Conversely, an AC application, that's thrashing that ferrite-bead-like dead zone around zero, is going to melt the core. (Not actually: as T approaches Tc, Bsat falls asymptotically, so the dead zone shrinks, as does main-winding saturation. It's self limiting—indeed, the phenomenon used in Metcal® soldering irons to regulate tip temperature! Downside: in a constant-voltage application, the source will keep trying to force flux into an inductor that can't handle it, and copper losses skyrocket.)

Radiation should also be worse. This depends on core type, but the self-shielding styles, like RM, P, PM and PQ, will suffer the most. The very flux path that's responsible for the good shielding, becomes saturated, and the emitted field looks more like that around a U-type core. Open styles, like E, won't be impacted as much (because they're already kind of U-like), but still made worse.

Half Turns. Can you actually do half turns? Yes! The key is to apply a flux-balancing winding, that enforces equal flux in the outside legs. There is an excellent Unitrode (now TI) appnote on the subject, among lots of other useful information.

 

Measurements

And what good would all this text be without some numbers on it?

Operating Point Data
Half-Load Condition
Supply voltage 24.34V
Input current 1.401A
Input Power 34.1W
Output voltage 5.209V
Output current 5.2A
Output power 27W
Efficiency 79%
TR6 Temp 55.4°C
D9 Temp 51.2°C
L1 Core Temp 42.6°C
L1 Winding 46°C
Other Load Conditions
Input Current Load Current
42mA 0A
343mA 1.0A
618mA 2.0A
1.401A 5.2A
3.0A 10A

Overall, efficiency isn't too bad. Again—definitely better than a linear supply!

SW Waveform

Quirky: the pulse widths from the two outputs (IC2 pins 12 and 13) are mismatched. It's not clear if this is a compensation issue (but, period-doubling is uncommon, outside of peak current mode controllers), or mismatch internal to the controller. Otherwise, the switching waveform looks quite reasonable. At an average duty cycle of 27% and Rds(on) of 0.1Ω, this gives TR6 a conduction loss of 0.67W at half load. Assuming Vf = 0.8V, D9's conduction loss is 2.9W, a clear stinker.

SW Waveform, Rising Edge

The rise time is surprisingly good, but let's inspect it closely: note how it kind of toes in, about 80ns before the edge? That would be the transistor beginning to turn on. Evidently, the transistor turns on (more or less fully) in about 50ns, which shows the current path from IC2, through D4 and C6, is capable of turning on TR4 quite hard indeed. In the next 20ns, the diode recovers, and voltage slams open. What is the switching loss here? During recovery, current is ramping up, while transistor voltage remains high. If current ramps linearly (an okay approximation), then power also rises linearly, to a few hundred watts peak. After commutation, current remains high but voltage snaps up, so the power ramps down. Both phases approximate the sides of a triangle, so we can estimate the turn-on switching energy by the area of that triangle: it's about 80ns wide and 240W tall, or 19uJ. At 65kHz, this contributes 1.25W (at half load).

The overshoot is due to stray inductance, primarily the two ferrite beads acting in series. It's one spike with a well damped recovery, as you would expect from a lossy ferrite bead. There is a slower ringing phase afterwards, probably due to C8 and stray inductance (but, C7's relatively high ESR should dampen that well, so I'm not sure).

SW Waveform, Falling Edge

Turn-off is quite slow, as expected. Also as expected, it is sped up when R14 is reduced (by placing another 4.7k in parallel with it). While the falling edge seems reasonable here (73ns), that's during the Miller plateau, where TR6 current remains high. The current tapers off during the next 330ns. Using the triangle method, this gives a turn-off switching loss of 2.6W (at half load).

OUT Waveform, Ripple

Output ripple is not terribly good. Note: all waveforms are measured with 10x probes, so this is 100mVp-p. The triangle wave indicates this is predominantly due to output capacitor ESR. As a voltage mode control, ESR will be significant in compensation and transient response as well...

OUT Waveform, Step Response

This is the output step response, for a load of 5A pulsed to 10A. Peak excursion about 300mV. (Note that the switching ripple has been mostly averaged out.) For a digital logic circuit with additional bypass on board, this would be fine. This wouldn't be so great for an analog supply, where you might want to add an LC filter. The DC voltage stability is very good, staying close to 5.20V over the whole load range, starting to drop off at 11A. It seems the nominal output of this module is indeed very close to 5V, 10A.

VIN and IS1 Waveform

VIN (green) and IS1 (blue) voltages (Ch3 is SW, for trigger.) 500mV/div across 55mΩ gives 9.1A/div. I took the liberty of coloring and compositing the traces, to show how significant C7's ESR is (evidently, around 70mΩ) and allow a visual subtraction of it.

While not easily visible at this scale, this waveform was used to measure TR6 turn-off. The blue rising edge is approximately a straight slope, 330ns long, measured from SW falling edge 50% threshold, to IS1 10% threshold.

EMI survey. The input capacitor appears to be a bit high on ESR. The input choke helps a lot. Output capacitors seem alright, considering how much smaller they are; very little RFI output, just ripple from ESR. Using a near field probe, strong switching spikes are visible around TR6 and D9 leads and associated components, as expected from the amount of stray inductance in the area. The EMI pattern around L1 is off-center, which is interesting, and nicely confirms my hypothesizing above.

H-field Probe Sniffer

L1's stray field was probed at each tick mark position. Pictured: position 0. Positions are numbered by mm distance from 0.

H-field Probe Results, Half Turn Configuration H-field Probe Results, Full Turn Configuration

These are the results. Vertical: arbitrary scale. Horizontal: distance in mm from indicated edge. Left: the original configuration, with a half turn. The amplitude peaks about 1/4 of the way over, and there is a null (phase reversal) at about 3/4ths. Right: modified. A half turn was added with hookup wire, completing a full turn. The wire was routed closely around the outside of the inductor, keeping the wire as low to the board as possible. Result: reduced amplitude (about 3dB savings), and a nearly symmetrical pattern (no phase reversal). The slight rise near 0 is probably due to proximity to the added wire (which was placed on that side), and the bump on the right may be due to the heatsink blocking the probe. The overall shape should be parabolic, and certainly is closer than the original.

So this nicely confirms the suspicions others have had, that this half-turn configuration has higher EMI; although not dramatically higher in this operating condition.

 

Conclusion

We've evaluated a classic design, learning from the masters as it were. The circuit was simple and easy to analyze, and no difficulties were found (how boring!). The most important lessons, I think, are partly historical, being able to see how far we've come; and the particular exploration of the half-turn inductor (which would be a great title for an electronic-themed Harry Potter parody?..), which brings a clear answer to an obscure question.

Easter Egg note—I swear this wasn't an intentional selection, but this module does happen to use exactly seven transistors, not counting its two ICs.

 

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